FPGA Implementation of “Soft Decision Tree (SDT) for Classification of Epilepsy Risk Levels from Fuzzy Classifier Using EEG Signals”

1. INTRODUCTION

Medical expert systems are a demanding field that demands the collaboration of different scientific fields. The portrayal of therapeutic experience and skills, decision-making in the face of ambiguity & inaccuracy, the selection &implementation of relevant models are a few of the concerns that a medical specialist method should address. Uncertainty is generally viewed probabilistically, but approaches based on fuzzy techniques have recently gained filed. The model adjustment (training) parameter is an optimization of the appropriately designed “error” function. There are a number of techniques with different textures that can accurately explain the subtlety of optimization measures and are a guide to choosing an appropriate approach to training[9]. This uniqueness of a decision tree classifier is very attractive when it is possible to evaluate the required subsets of features and the decision policy at each inside node[10].

1. “General Techniques “

The EEG is the amain clinical method for the diagnosis, management & treatment of neurological conditions connected to epilepsy. This disorder is characterized by unexpected, recurring, and temporary cerebral activity and/or body movement disturbances, resulting in too much release of brain cells [3]. The occurrence of Epileptiform action in the EEG supports an epilepsy analysis, it is frequently mistaken for other seizure-like disorders[4]. Multiple types of epileptic seizures have different patterns on the EEG waveform. By real-time monitoring to identify epileptic seizures gaining extensive acceptance, the invention of computers has provided a number of methods to accurately compute the changes taking place depending on EEG signals. This paper explores the SDT models FPGA Synthesis to optimize fuzzy outputs in the risk classification for epilepsy.

1. “MATERIALS AND METHODS”

The EEG data utilized in this investigation are gathered from 20 epileptic patients at the Branch of Neurology at SNR Hospital, CBE, India. A record of EEG data from 16 sources is obtained from an experimental EEG. Artifacts elimination of EEG data and acquirement

“Estimation of Risk Level in Fuzzy Outputs”

Optimization of the outputs of the fuzzy system is very important, as the output of a fuzzy logic reflects a wide range of danger levels. A particular method of coding process the fuzzy values of the output as individual code like an alphabet string as shown in the table. I

Table.I“Representation of Risk level Classifications”

1. “SOFT DECISION TREES FOR OPTIMIZATION OF FUZZY OUTPUTS AS HYBRID CLASSIFIER”

The main goal is to combine the epilepsy risk level demonstration with estimated logic skills and trees for symbolic decision making. Using SDT[9] reduces the problem of high dimensionality linked with the decision by multi-criteria and small teaching samples.

Besides several benefits, there are many major limitations associated with decision trees i) It can accumulate errors from stage to stage in a large tree. Thus, no, one cannot concurrently maximize both precision and effectiveness ii) improved the number of terminals when the number of classes is high and this leads to increased search time and memory space requirements. iii) Finally, optimal SDT design can present difficulties. The task of calculating a truly optimal SDT is an extremely hard one[9].

A. Algorithm for SDT Optimization

The various heuristic methods for building SDT can be loosely divided into four categories: Bottom-up approaches, Top-Down approach the hybrid approach, and Tree Rising pruning approaches [10]. Using a bottom-up method, a decision tree was developed and analyzed. The pair of wise distances between a priori defined group are decided using max-min soft decision measures, and the two classes with the node decision are combined to form a new group at each point, and this process is repeated until one group is left in the middle, which will be the optimized risk level patterns for epilepsy. The generic representation of SDT optimization is explained, allowing W=[Pij] to be the matrix of co-occurrence with I j) elements representing the risk level trends of a single epoch based on fuzzy epilepsy. Potential epochs comprise 48 (16×3). Three SDT models such as (16-8-4-2-1), (16-4-2-1), and (16-2-1) were selected for the optimization of fuzzy patterns. A Method – I (Max-min) or Method – II (Min-max) decision strategy was implemented in the three SDT models above at each node. This created six types of SDT models.

In the case of (16-8-4-2-1) model, an epoch of (16×1) elements was considered to be the leaf nodes of the tree. The next stage of the tree was named B with eight decision nodes followed by C with four soft decision nodes. The additional level with two nodes was known as level D, and the final level was level E with a single node that was the root of the tree. The succeeding decisions were taken at trees per node.

Figure. 2  “Optimization of Epilepsy Risk Levels through   STD (16-8-4-2-1) model with (Max-Min) Method I”

IV. “VHDL Synthesis and Programming Xilinx board (SPARTAN 3) Using ISE”

In modern centuries the “VHSIC (Very High-Speed Integrated Circuit) Hardware Design Language (VHDL)” has to turn into a kind of engineering benchmark for high-level hardware design. It is an open “IEEE standard” it is reinforced by a wide range of design tools and is highly between dissimilar vendor tools[17].

A. VHDL Bench Test Processes

VHDL tools have a feature, called simulation, to test the correct functionality of the VHDL code. The simulation requires the VHDL code and simulates how hardware operates.VHDL code is executed using a proficient and a typical tool by the use of an amazing form called a test bench as per “Xilinx (2006) manual”[18].

The synthesis method converts the gate -step netlist from the VHDL model. The new tools include hardware-separate generic blocks such as “logic gates and RTL blocks, such as arithmetic-logic units and multiplexers, wires-connected comparators”[12]. A second programme named Builder. The main purpose of this builder is to create or attain all of the necessary RTL blocks in the user-defined target technology from a library of predefined components. A logic optimizer, having created a gate-level netlist, reads in this netlist and optimizes the circuit for the user-specified zone and timing constraints [13]. The Module Builder can also use these areas and timing constraints to pick or generate suitable RTL blocks. The different synthesis system supports different synthesis subsets of VHDL, every synthesis, the structure can provide dissimilar mechanisms for modeling a flip-flop or a latch[14].

7. CONCLUSION

In this article, we deliberate a generalized description of the risk level of epilepsy from EEG signals in patients with EEG. EEG signals are considered here as a data set and the parameters are observed from these EEG signals. Then at each EEG wave, the fuzzy logic is applied to the risk level from every epoch. The goal was to identify accurate risk levels with an extraordinary detection rate, a short initial latency, and a small false alarm rate. While a perfect result under all these conditions is difficult to achieve, some concessions have been done. Since a high false alarm rate destroys the system’s efficacy, the most important thing is a low false-alarm rate. The fuzzy outputs of complex probability functions are extremely nonlinear in nature. STD-based optimization methodology was chosen to maximize the level of risk by integrating the above objectives. FPGA SDT simulation was conducted and the mat lab version is closely followed. Further research aims at comparing these hybrid models to the Fuzzy SVM model in order to solve this open-end problem.